Retention Registers

• These cells are special flops with multiple power supply.
• They are typically used as a shadow register to retain its value even if the block in which its residing is shut-down.
• All the paths leading to this register need to be ‘always_on’ and hence special care must be taken to synthesize/Place/route them.
• When design blocks are switched off for sleep mode, data in all flip-flops contained within the block will be lost. If the designer desires to retain state, retention flip-flops must be used”
• The retention flop has the same structure as a standard flop.
• However, the retention flop has a balloon latch that is connected to always on Vdd.
• In Normal mode the state saving latch will not be active.
• Just before power down the value in the regular filp-flop will be transferred to the state saving register and the power to the regular register will be shut down.
• The power to the state saving latch shoud be maintatined and thus it keeps the register state.